SD, SDIO, eMMC Protocol Analyzer

SD, SDIO, eMMC Protocol Analyzer (PGY-SSM) is the Protocol Analyzer with multiple features to capture and debug communication between the host and design under test. SD, SDIO, and eMMC Protocol Analyzer support SD, SDIO, and eMMC for data rates up to 200MHz (HS400) DDR mode. SD, SDIO, and eMMC Protocol Analyzer is the industry’s first eMMC protocol analyzer that supports version 4.41, 4.51, 5.0, and 5.1 specifications.

The innovative active probe has minimum electrical loading on the device under test (DUT) and allows protocol data capture without affecting the performance of the DUT. In an industry-first feature, the PGY-SSM protocol analyzer allows continuous streaming of protocol data from the PGY-SSM Protocol Analyzer to the host system (using USB 3.0 or GbE interface) running the UI. Comprehensive decoding of protocol data, command units, and real-time error analysis enables effective verification of communication of SD/SDIO/eMMC host and device.

PGY-SSM Protocol Analyzer enables design and verification engineers to test and debug SD, SDIO, and eMMC by triggering command, response, data, or CRC errors. It also provides instantaneous decoding of Command, Response, CID, CSD, and Ext CSD registers. The Analytics feature offers an easy analysis of the graphical representation of command, response, data, and frequency of operation for the acquired duration.
 

Key features

• Continuous monitoring of protocol data for a long time to capture elusive events (more than 30GB data capture)
• Analysis of captured data per standards for protocol integrity, count of data bursts, CMD CRC errors, Response CRC errors, Data CRC errors, Timing Values, and Reserved commands
• Hardware-based protocol-aware trigger capability in real-time enables capturing specific Events. Triggering facility on patterns, commands, or error events.
• Users can identify the anomalies by decoding command and response arguments
• Analytics feature provides analysis of acquired protocol data by plotting command, response, data, and frequency of operation over acquired time
• The analytics feature also provides the decoding of device registers for easy analysis
• Filters allow you to view specific packets in decoded protocol packets
• Search feature for specific events in protocol activity
• Easy-to-use user interfaces save time on the learning curve
• Handles long-duration capture and displays the decoded data without demanding extensive resources in the host computer
• Inserting markers [using Trigger-In] in protocol activity helps in correlating the input digital signal with Protocol Activity
• Trigger-out signal for any specific protocol event allows triggering of other instruments such as oscilloscope
• Interface to host system [running UI] using USB3.0 or Gigabit Ethernet interface
• Flexibility to upgrade the hardware firmware using the GbE interface provides easy field up-gradation of firmware
• Export of Decoded data packets to a txt file for further analysis.